Cypress Semiconductor /psoc63 /BLE /BLESS /EXT_PA_LNA_CTRL

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Interpret as EXT_PA_LNA_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE_EXT_PA_LNA)ENABLE_EXT_PA_LNA 0 (CHIP_EN_POL)CHIP_EN_POL 0 (PA_CTRL_POL)PA_CTRL_POL 0 (LNA_CTRL_POL)LNA_CTRL_POL 0 (OUT_EN_DRIVE_VAL)OUT_EN_DRIVE_VAL

Description

External TX PA and RX LNA control

Fields

ENABLE_EXT_PA_LNA

When set to 1, enables the external PA & LNA

CHIP_EN_POL

Controls the polarity of the chip enable control signal 0 - High enable, low disable 1 - Low enable, High disable

PA_CTRL_POL

Controls the polarity of the PA control signal 0 - High enable, low disable 1 - Low enable, High disable

LNA_CTRL_POL

Controls the polarity of the LNA control signal 0 - High enable, low disable 1 - Low enable, High disable

OUT_EN_DRIVE_VAL

Configures the drive value on the output enables of PA, LNA and CHI_EN signals 0 - drive 0 on the output enable signals 1 - drive 1 on the output enable signals

Links

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